1 ? an1488.0 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2009. all rights reserved all other trademarks mentioned are the property of their respective owners. fixed dc/dc regulator output margining using digitally controlled potentiometer many applications using a dc/d c regulator are implemented with a resistor divider in the feedback path to set up vout. however, for some high end applications, the voltage needs to be adjusted in order to optimize the application?s performance. a digitally controlled potentiometer (dcp) can be used in both high end and low end applications to provide this flexibility. the typical buck dc/dc conver ter scheme includes a pwm driver, switches, inductor, filter, and feedback divider (figure 1). the feedback voltage, fb, from the resistor divider r1 and r2, is a negative input for the error amplifier of the voltage control loop. in addition to the point of load regulation, the feedback divider also sets up the desired output voltage, vout. in other words, vout is programmable through an external resistor divider based on equation 1. where vref is a reference voltage and a positive input for the error amplifier. the minimum output voltage can be set as low as vref, according to equation 1. the maximum output is also determined by the resistor divider ratio, as well as input voltage and the maximum duty cycle. the reference voltage, vref, can be obtained from a pwm controller datasheet. thus, making the feedback divider adjustable makes the dc/dc regulator also adjustabl e, as shown in figure 2. the adjustable output voltage of the dc/dc regulator can be expressed by equation 2. where r1 and r2 are fixed resistor s, rw is a wiper resistance, rtotal is the total resistance of the dcp, code is a decimal code of wiper position and n is a total number of wiper taps. the advantages of having the dcp in serial with the r2 resistor (rather than in parallel) are easier calculation and bandwidth limitation of the dcp. the dcp terminals have a parasitic capacitance of 10pf to 25pf, which is shown in figure 2 as crw. connecting any of the dcp terminals to the fb node will cause phase shift and may decrease dc/dc regulator performance, such as transient response and stability. the right dcp should be chosen to meet the application requirements based on knowing the vout adjusting range and desired resolution. for example, we would like to adjust the vout output voltage of a dc/dc regulator, built on the isl85001 pwm controller, in a range from 0.8v to 3.3v. the dcp total resistance, rtotal, r1 and r2 resistor values can be derived from equation 2. for simplicity, it can be overwritten as equation 3, w here the wiper resistance is counted together with the r2 se rial resistor. the suggested value of the r2 resistor shou ld be less than or equal to 0.1*rtotal in order to have a bigger adjusting range. the maximum vout will be at code = 0 and the minimum vout will be at max code = n -1 according to the isl85001 datasheet, the internal vref = 0.6v and the recommended value for th e r1 resistor is from 1k to 10k . since the number of rtotal values of the dcps are limited, let?s select the rtotal = 10k first and then calculate r1 and r2. fb vin l1 d1 c1 vout r1 r2 pwm controller error vref figure 1. typical buck dc/dc converter vout vref r1 r2 ------- - ? ? ? 1 ) + = (eq. 1) vout vref r1 r2 rw rtotal code n 1 ? () ? ? ++ ----------------------------------------------------------------------------------------- 1 + ?? ?? ? = (eq. 2) fb vin l1 d1 c1 vout r1 r2 rw dcp crw pwm controller error vref figure 2. adjustable point of load dc/dc regulator vout vref r1 0.1rtotal rtotal code n 1 ? () ? ? ++ 0.1rtotal rtotal code n 1 ? () ? ? + ---------------------------------------------------------------------------------------------------------- - ? = (eq. 3) (eq. 4) vout max () vref r1 0.1rtotal + 0.1rtotal ---------------------------------------- - ? = (eq. 5) vout min () vref r1 1.1rtotal + 1.1rtotal ---------------------------------------- - ? = r1 0.1rtotal vout max () vref ? vref ------------------------------------------------- 1k 3.3v 0.6v ? 0.6v ------------------------------- ? = ? 4.5k = = (eq. 6) r2 1k application note august 17, 2009
2 intersil corporation reserves the right to make changes in circuit design, software and/or specifications at any time without n otice. accordingly, the reader is cautioned to verify that the application note or technical brief is current before proceeding. for information regarding intersil corporation and its products, see www.intersil.com an1488.0 august 17, 2009 thus, the ideal dcp for this example should have an rtotal resistance of 10k and minimum wiper resistance. there are some other features that should be taken into account when choosing the appropriate dcp, such as digital interface, non-volatile programmability, rtotal tolerance and temperature coefficient (tcr). most of the available dcps on the market have a 20% rtot al tolerance from part to part. that means each dc/dc regulator requires calibration and that the calibrated value of the wiper position can be stored in the non-volatile memory. the perfect solution for dc/dc margining uses a 1% precision dcp, like the isl22317, which eliminates the necessity of individual calibration and provides 0 of wiper resistance and low tcr. the vout curve versus isl22317w tap position is shown in figure 3. since equation 2 is a hyperbola, the vout resolution per step changes with the tap position, from 50mv per tap at the low end to 2mv per tap at the high end of the dcp settings in our example. figure 3. the isl85001 vout vs the isl22317w tap position 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 20 40 60 80 100 120 tap position (decimal) v out (v) application note 1488
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